The entire disclosure of U.S. patent application Ser. No. 08/449,495 filed May 24, 1995 is expressly incorporated by reference herein.
1. Field of the Invention
The present invention relates to a thin film semiconductor device, and a method for fabricating such a thin film semiconductor device. In particular, the present invention relates to a thin film semiconductor device used for a liquid crystal display device (hereinafter, abbreviated as "LCD") for driving liquid crystal, a sensor for reading images, a load of RAM (Random Access Memory) and the like, and a method for fabricating such a thin film semiconductor device.
2. Description of the Related Art
A thin film semiconductor device includes a thin film semiconductor layer formed on a substrate having an insulating surface such as a quartz substrate or a glass substrate. A thin film transistor (TFT) is utilized in various fields. Hereinafter, a conventional example of a polycrystalline silicon thin film transistor, which has been developed for the use for a liquid crystal display (LCD), will be described.
Recently, in the field of the liquid crystal display using the thin film transistor, a polycrystalline silicon thin film transistor (hereinafter, referred to as a "low-temperature poly-Si TFT"), which can be fabricated at a relatively low temperature (about 600.degree. C. or less) at which inexpensive glass substrates can be used instead of expensive quartz substrates, has attracted attention. However, one of the important problems to be solved of the low-temperature poly-Si TFT is the improvement in quality of a gate insulating film. Therefore, various gate insulating films have been examined.
A low-temperature poly-Si TFT described in "Society of Information Display International symposium Digest of Technical Papers/Volume XXIV (1993) pp. 387-390" will be briefly described as a conventional example, with reference to FIGS. 4A to 4D.
The low-temperature poly Si TFT is fabricated as follows.
First, an amorphous silicon film is deposited on a top surface of a substrate 12, and then it is irradiated with a laser light so as to locally heat and melt the amorphous silicon film. As a result, the amorphous silicon film is crystallized, thereby obtaining a polycrystalline silicon film 13. Thereafter, the polycrystalline silicon film 13 is patterned into an island shape by photolithography and etching (FIG. 4A).
Next, after a gate insulating film 14 which consists of an SiO.sub.2 layer is formed on the polycrystalline silicon film 13 by using an ECR-CVD method (FIG. 4B), a gate electrode 15 made of tantalum (Ta) is formed on the gate insulating film 14. Thereafter, by using the gate electrode 15 as a mask, impurities serving as donors or acceptors are introduced into the polycrystalline silicon film 13 by ion doping in which mass separation is not conducted, thereby forming a source region 16 and a drain region 17 (FIG. 4C). After forming an interlevel insulating film 18, a source electrode 19 and a drain electrode 20 are formed on the insulating film 18. As a result, a low-temperature poly-Si TFT shown in FIG. 4D is fabricated.
In the conventional low-temperature poly-Si TFT shown in FIGS. 4A to 4D, the gate insulating film 14 which consists of an SiO.sub.2 film is deposited by the ECR-CVD (Electron Cyclotron Resonance Chemical Vapor Deposition) method. Therefore, it has been reported that the low-temperature poly-Si TFT has good characteristics as compared with SiO.sub.2 deposited by an AP-CVD (Atmospheric Pressure Chemical Vapor Deposition) method or LTO (low temperature oxide). However, even if the ECR-CVD method is used, the most important interface of semiconductor/insulating film, which affects device characteristics, becomes remarkably unstable. The reason for this is that the SiO.sub.2 layer functioning as the gate insulating film 14 is deposited after the polycrystalline silicon layer 13 is formed and the substrate is subjected to processes such as a cleaning process. The state of the interface between the insulating film deposited by a CVD method and the semiconductor may greatly change due to various conditions such as a cleaning condition before depositing the insulating film, waiting time after the cleaning until deposition, an atmosphere immediately before the deposition. As a result, the interfacial states at the semiconductor/insulating film interface may be remarkably degraded. Thus, characteristics of a thin film transistor are prone to be degraded. Moreover, in order to perfectly control the interfacial states density, it is necessary to strictly control the fabrication conditions. Therefore, this method is not suitable for mass production. Furthermore, the method has another problem that the production yield is low due to pin holes of the insulating film and the like since the gate insulating film is obtained by a CVD method.
In the field of LSI, a thermal oxide film made of silicon is generally utilized as a gate insulating film in order that the interfacial states density is controlled at a predetermined level or a lower level. However, growth of such a thermal oxide film requires high temperature process. Therefore, it is necessary to use an expensive quartz substrate which induces no strain even in a high-temperature process, resulting in an increase in the fabrication cost.